EDN

ARM’s AXI takes AMBA-bus symmetric

SAN JOSE, Calif. — Processor intellectual property vendor ARM Holdings plc has defined a high-performance protocol option within its AMBA on-chip bus. AMBA, which originally stood for Advanced ...
Electronic Design

Formal Techniques for Protocol Verification: A Case Study On Verifying the ARM ACE Protocol

More processors on SoCs means more sophisticated cache control. This article describes formal techniques for verifying cache coherency for the ARM AMBA AXI Coherency Extensions (ACE) protocol. Fig 1.
EDN

Self-timed interconnect solution supports AXI bus protocol

SAN FRANCISCO — EDA and intellectual property (IP) startup Silistix Ltd. has added support for the on-chip AMBA AXI bus protocol to the company's synthesized self-timed interconnect technology, ...
Hexus

ARM AMBA 4 SPECIFICATION MAXIMIZES PERFORMANCE AND POWER EFFICIENCY

CAMBRIDGE, UK - Mar. 8, 2010 - ARM [(LSE: ARM); (Nasdaq: ARMH)] today announced availability of phase one of the new AMBA® 4 specification, providing increased functionality and efficiency for complex ...