EDN

How to manage changing IP in an evolving SoC design

In a previous article, Getting started in structured assembly in complex SoC designs, an unexceptional system-on-chip (SoC) design was shown to contain hundreds of intellectual property (IP) blocks.
Morningstar

Arteris Addresses Silicon Design Reuse Challenge with New Magillem Packaging Product for IP Blocks and Chiplets

Scalable and fully automated generation of IP packaging for both reused and new IP blocks, with support for legacy 2009 and 2014 versions of IEEE 1685 standard, with intuitive graphical editors ...
EDN

IP model shift: from blocks to app-specific subsystems

San Mateo, Calif. — The embedding of digital media capability into just about everything consumers touch is changing the way system designers use intellectual property. In the process, it could be ...
Electronic Design

Adding Cache to IPs and SoCs

Cache memory significantly reduces time and power consumption for memory access in systems-on-chip. Technologies like AMBA protocols facilitate cache coherence and efficient data management across CPU ...
Semiconductor Engineering

Securing IP Integrity In Advanced SoC Design

In today’s complex system-on-chip (SoC) design flows, intellectual property (IP) blocks are everywhere—licensed from third parties, leveraged from internal libraries, or hand-crafted by expert teams.