Semiconductor Engineering

Automate Memory Test Through A Shared Bus Interface

The use of memory-heavy IP in SoCs for automotive, artificial intelligence (AI), and processor applications is steadily increasing. However, these memory-heavy IP often have only a single access point ...
EDN

High bandwidth memory (HBM) PHY IP verification

Memory systems have evolved a lot in the previous few years due to advancements in fabrication technology. High Bandwidth Memory (HBM) is an example of the latest kind of memory chips which can ...
EDN

Industry Collaboration Marches Ahead with Official Release of DDR PHY Interface Specification Version 2.0 Accelerating DDR Memory System Development

SUNNYVALE, Calif., May 21, 2008 – Denali Software, Inc., today, as one of the DDR PHY Interface (DFI) specification participating members including ARM, Denali, Intel, and Samsung, announced the ...
Semiconductor Engineering

HBM4E Raises The Bar For AI Memory Bandwidth

The Rambus HBM4E memory controller extends a long-standing Rambus leadership position in HBM controller IP. Being first to ...

Rambus targets AI memory bottlenecks with new HBM4E controller IP

The new HBM4E Controller builds on Rambus’s track record of more than 100 HBM design wins and the company’s long-standing focus on memory interface IP. The new controller incorporates advanced ...
Business Wire

MIPI M-PHY Update Doubles Peak Data Rate for Next-Generation Flash Memory Storage Applications

PISCATAWAY, N.J.--(BUSINESS WIRE)--The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced a major update ...
Design And Reuse

Synopsys Delivers First Complete UFS 5.0 and M‑PHY v6.0 IP Solution for Next‑Gen Storage

As data volumes grow across mobile, automotive, and AI-enabled systems, storage performance has become a critical factor in overall SoC capability. Faster compute and richer software place increasing ...
Business Wire

Kioxia First to Introduce Next-Generation UFS Embedded Flash Memory Devices Supporting MIPI M-PHY v5.0

TOKYO--(BUSINESS WIRE)--Kioxia Corporation, a world leader in memory solutions, today announced sampling [1] of the industry’s first [2] Universal Flash Storage [3] (UFS) embedded flash memory devices ...
Design-Reuse

eSilicon Offers Complete 90nm DDR2 Memory Interface Solutions

SUNNYVALE, Calif. — September 05, 2006 - eSilicon Corporation, a leading supplier of custom integrated circuits (ICs), today announced it is offering complete, customized Double-Data Rate 2 (DDR2) ...
Compound Semiconductor

UltraRAM: A viable solution for post-silicon memory?

Variability kills memory It’s tempting to draw parallels between emerging memory concepts and development trajectories for UltraRAM and other post-silicon semiconductor technologies. But that’s a ...
Forbes

Leak Suggests AMD's Next-Gen Navi GPU Will Feature GDDR6 Memory With 256-Bit Interface

Some images of a PCB (printed circuit board), reportedly for AMD’s next-generation Navi GPUs, have surfaced that suggest it will use GDDR6 memory, linked to the GPU via a 256-bit memory interface. For ...
TechSpot

Move over M.2, here comes the XFM memory specification

Why it matters: The JEDEC Solid State Technology Association has introduced a new Crossover Flash Memory (XFM) specification for NAND storage, designed to replace the existing M.2 form factor. Its ...