TechRepublic

IC Layout Design of Decoder Using Electric VLSI Design System

In this paper, the authors discuss the design of an Integrated Circuit (IC) layout for a decoder. The layout was designed by using an open source software namely electric VLSI design system as the ...
Design-Reuse

Synopsys Introduces Optimized DTS-HD Decoder for DesignWare ARC Audio Processors

MOUNTAIN VIEW, Calif., May 8, 2014 -- Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced ...
Design-Reuse

Improving Design Timing and Simplicity for Lower Cost and High Performance Multistandard Audio Decoder STA012

The complexity of today's System On Chip (SoC) designs requires a faster and simpler flow and methodology for new SoC design projects. So, to get more SoCs to market faster-and less ...
EDN

Micronas introduces DVB-S2 PCIe design to tune and decode H.264 at HD-quality for media PCs

Micronas announced the launch of MicHognose™2D-X, a dual-tuner DVB-S2 PCI Express® card reference design for home theater solutions. The MicHognose™2D-X reference design allows ODMs and OEMs to ...
EDN

Cutting Power in Turbo Coding Architectures

Turbo coding architectures lie at the heart of all of the third-generation (3G) wireless standards, including UMTS and cdma2000. These coding architecture are called for because they allow systems to ...