IEEE

Programmable Analog-to-Digital Converter Array Supporting Architecture Restructuring and Mode Concurrency

Abstract: This work presents a new analog-to-digital converter (ADC) architecture named programmable converter array (PCA) for multi-standard signal acquisition. Unlike prior reconfigurable ADCs that ...
Le Lézard

MicroCloud Hologram Inc. Utilizes FPGA to Accelerate Tensor Network Computing to Achieve Quantum Spin Models

MicroCloud Hologram Inc. , ("HOLO" or the "Company"), a technology service provider, proposed an innovative hardware ...

PPWFC offering funding for employee training

(COLORADO SPRINGS) — The Pikes Peak Workforce Center (PPWFC) said it has $250,000 available in its Employee Development Funds to award companies that want to increase the workforce expertise of their ...
IEEE

A Novel Parallel In-Memory Logic Array Based on Programmable Diodes

Abstract: Computing-In-Memory (CIM) is widely applied in neural networks due to its unique capability to perform multiply-and-accumulate operations within a circuit array. This process directly ...
GitHub

Example: Advent of Code 2025

This page describes a series of examples from the Advent of Code 2025 problem set. The solutions were implemented in hardware as part of the Advent of FPGA 2025 challenge. Is PipelineC HLS? No, not ...